chapter five

5 Systems

 

5.1 Computer Architecture

5.1.1 Instruction Pipelining

Rather than starting with a definition of instruction pipelining that many would find unclear, let’s first understand why it’s necessary by exploring how CPUs process instructions. This will give us a clearer picture of the problem and why it’s a fundamental technique in modern CPUs.

A CPU typically processes an instruction through four stages:

ch05 figure 1
  • Fetch: Fetch the instruction from memory.
  • Decode: Decode the instruction to understand what operation is required.
  • Execute: Execute the operation (e.g., arithmetic or logic operations).
  • Write: Write the result back to memory or a register.
Note

This is a simplified view, but it should be enough to understand today’s concept.*

Assume that each of these stages takes one cycle to complete. Therefore, processing a single instruction would take four cycles (i1 stands for instruction 1):

ch05 figure 2

And processing two instructions would then take eight cycles:

ch05 figure 3

If we were a CPU designer, how could we make things faster?

5.1.2 Simultaneous Multithreading

5.2 Linux

5.2.1 Linux Soft vs. Hard Lockup