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Simultaneous multithreading

As explained in Latency

Hyper-Threading is a processor technology that allows one physical core to execute multiple hardware threads concurrently.

Simultaneous multithreading (SMT), also called hyperthreading, lets multiple threads execute concurrently on one physical CPU core. The core duplicates architectural state, including registers and program counters, but shares execution resources. The operating system sees multiple logical cores where there is one physical core. section 2.3.2

SMT can increase throughput, but logical cores compete for execution units, memory bandwidth, and caches. A resource-intensive thread can stall another thread on the same physical core. That contention makes SMT a potential source of latency variance, particularly when tail latency matters. section 2.3.2

When reasoning about concurrent threads, distinguish three ways they make progress:

  • On a single core, the operating system can switch between threads, making their progress appear simultaneous. section 9.1
  • On separate physical cores, threads can execute in parallel without sharing a core. section 9.1
  • With SMT, threads execute concurrently on logical cores that share one physical core. For ultra-low-latency applications, consider disabling SMT when its contention outweighs its throughput benefit. section 2.3.2
Figure 9.1 Concurrency versus parallelism. Concurrent execution (on the left) interleaves thread execution on a single core, which provides an illusion of work happening at the same time because all threads make some progress quickly. In contrast, parallel execution (on the right) executes the threads simultaneously on different cores, providing true parallel execution.
Figure 9.1: Concurrency vs parallelism. Concurrent execution interleaves threads, while parallel execution executes them simultaneously.

The figure contrasts interleaving on one core with execution on separate cores. SMT adds a different case: concurrent threads on one core with shared execution resources. section 9.1 section 2.3.2

How Latency covers it

How deep it goes
Explains duplicated architectural state and shared resources, but provides no configuration commands or benchmark procedure.
Examples
Uses a resource-intensive thread stalling another logical core and a figure contrasting interleaved with parallel execution.
What it assumes
Introduces operating-system scheduling and single-core versus multicore execution before positioning hyperthreading among them.
What you can do after
Evaluate/understand it by weighing additional throughput against per-thread latency and considering disabling SMT for ultra-low-latency applications.
How it connects
Connects SMT to logical cores, resource contention, tail latency, concurrency, and parallelism.

Related concepts

This explainer was generated by Manning's knowledge graph from the text of Latency. The section links point to the parts of the book it draws on.