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Endianness

As explained in Latency

Byte order is the ordering of the bytes that represent a multi-byte value in memory or in a serialized representation.

Endianness is the ordering of bytes used to represent a multi-byte value in memory or a serialized representation. CPU architecture determines in-memory byte order, so mismatches can require transformation during serialization and deserialization. section 7.3

A 32-bit value can be arranged in two principal orders:

  • Little-endian stores lower-order bits first and higher-order bits last; 0xE011CFD0 becomes 0xD0, 0xCF, 0x11, 0xE0 in memory. section 7.3
  • Big-endian stores higher-order bits first and lower-order bits last; 0xE011CFD0 becomes 0xE0, 0x11, 0xCF, 0xD0. section 7.3

Order identifier in memory

A Rust order structure stores orderId 1001 as the four bytes 0xE9, 0x03, 0x00, and 0x00 under little-endian order. Serialization presents the same value as JSON 0x000003E9, while deserialization reverses the transformation. section 7.3

Figure 7.2 Serialization transforms the in-memory representation of data (shown on the left as a Rust struct) to a serialized format such as JSON (shown on the right). Deserialization performs the opposite transformation from a serialized format to an in-memory representation.
Figure 7.4: Serialization transforms in-memory representation to a serialized format such as JSON. Deserialization performs the opposite transformation from serialized format to in-memory representation.

Compare the in-memory Rust struct with its JSON representation and the reverse deserialization path. section 7.3

How Latency covers it

How deep it goes
Defines little- and big-endian layouts with 32-bit examples, but stops short of implementation code or measurement procedures.
Examples
Uses a Rust order structure, a 32-bit order identifier, hexadecimal byte sequences, and JSON serialization.
What you can do after
Evaluate how little- or big-endian layout changes the byte representation and transformation work for serialized values.
How it connects
Connects byte order to CPU architecture, serialization, deserialization, memory copies, JSON, and network protocols.

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This explainer was generated by Manning's knowledge graph from the text of Latency. The section links point to the parts of the book it draws on.