Suppose a processor detects a fault while executing an instruction, such as division by zero or an access to a nonexistent memory bank. It raises a hardware interrupt at that instruction. The event is synchronous: the faulting instruction identifies where it occurred. section 19.6
On many processors, the fault selects an entry in an interrupt vector table. That entry points to a handler, and execution switches away from the program to run it. Fault names and locations vary across platforms, so using this mechanism directly is not portable. C signal handlers provide a portable abstraction for handling both hardware and software interrupts. section 19.6
TAKEAWAY: A hardware interrupt is tied to a faulting instruction; a software interrupt is asynchronous and may arrive during an intermediate execution state. section 19.6
