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Write-back with invalidation

As explained in Learn Concurrent Programming with Go

Write-back with invalidation is a cache-coherence protocol that propagates an updated cached value and invalidates stale copies in other caches.

Write-back with invalidation is a cache-coherence protocol for shared variables on multiprocessor systems. When one processor updates a cached value, other caches holding the same memory block detect the update through bus messages. They either apply the update or invalidate their cache line; an invalidated line is refetched from main memory when needed. section 3.1

Two CPUs sharing a variable

Thread 2 may retain an outdated copy in its local CPU cache after thread 1 updates the value. Invalidation removes thread 2’s stale cache line, so its next read fetches the updated value from memory. section 3.1

Figure 3.4 Updating shared variables in an architecture with caches

Use the cache-update figure to trace how a shared-variable write reaches other caches. section 3.1

How Learn Concurrent Programming with Go covers it

How deep it goes
Explains update detection, cache-line invalidation, and refetching, but stops short of implementation details.
Examples
Uses two threads, replicated memory blocks, bus update messages, and a shared-variable cache diagram.
What it assumes
Assumes basic memory sharing and processor-cache concepts while introducing cache-coherence protocols through a concrete scenario.
What you can do after
Evaluate/understand how invalidation prevents processors from continuing to read stale cached values.
How it connects
Connects cache coherence with memory sharing, processor caches, main memory, and multiprocessor systems.

Related concepts

This explainer was generated by Manning's knowledge graph from the text of Learn Concurrent Programming with Go. The section links point to the parts of the book it draws on.