The PPU control register is an NES graphics register used to configure PPU operation, including interrupt generation. Keep it cleared during reset so rendering-related hardware begins from a known state, then enable the needed behavior after initialization and vBlank synchronization. section 5.12
A practical initialization sequence is:
- Store 0 in PPU_CONTROL near the start of reset handling, alongside disabling the PPU mask and APU DMA control. section 5.12
- Wait for the initial vBlank, clear RAM, and move sprite entries offscreen before turning on later PPU behavior. section 5.12
- Enable NMI by loading %10001000 and storing it in PPU_CONTROL, then continue to the main program. section 5.12
- Keep the intended control value in ppu_ctl0 so the NMI routine can write it back to PPU_CONTROL during regular PPU updates. section 6.4
Setting pattern-table choices for a game
For a game setup, load ppu_ctl0 with VBLANK_NMI|BG_0000|OBJ_1000. This selects the first pattern table for background tiles, the second for sprite patterns, and requests vBlank NMI handling. Store the value for the NMI routine to copy to PPU_CONTROL. section 6.4
Listing 5.17 Enabling NMI interrupt (example.s)
#1
#1
#1
lda #%10001000
sta PPU_CONTROL
jmp main
.endproc
This reset-tail listing shows the direct PPU_CONTROL write that enables NMI after the startup work is complete. section 5.12
