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PPU mask register

As explained in Classic Game Programming on the NES: Make your own retro video game

The PPU mask register is an NES hardware register whose control bits configure rendering behavior, including whether rendering is enabled.

The PPU mask register controls whether the NES PPU renders the screen. During the NMI routine, clearing it disables rendering while larger video-memory updates are performed. section 5.13

A rendering update uses the register in two stages:

  • Write zero to PPU_MASK when nmi_ready equals 2, stopping screen drawing before video-memory changes. section 5.13

How Classic Game Programming on the NES: Make your own retro video game covers it

How deep it goes
Explains register writes inside the NMI routine, but does not detail the meaning of individual mask bits.
Examples
Uses zero to disable rendering and %00011110 to enable it within annotated NMI assembly listings.
What it assumes
Uses NES hardware-register access, assembly instructions, NMI handling, and video-memory updates.
What you can do after
Operate/configure NES rendering by writing appropriate values to PPU_MASK during an NMI update.
How it connects
Connects PPU rendering with the NMI routine, video memory, and the PPU control register.

Related concepts

This explainer was generated by Manning's knowledge graph from the text of Classic Game Programming on the NES: Make your own retro video game. The section links point to the parts of the book it draws on.