CPU cache
A CPU cache is small, fast memory that stores copies of data or instructions for quicker access by a processor.
Fast Python: High performance techniques for large datasets
- How it is used
- Explains why memory access patterns and hardware conditions change Python data-processing performance.
- How deep it goes
- Works through cache hits, memory transfers, and contiguous matrix access, without detailing cache implementation.
- Examples
- Times NumPy row and column operations and compares NumExpr speedups on server and laptop hardware.
- What you can do after
- Diagnose/debug cache-sensitive slowdowns by benchmarking array access patterns and retesting optimizations on target hardware.
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100 Go Mistakes and How to Avoid Them
A CPU cache is small, fast hardware memory that stores recently accessed data and instructions near a processor core.
- How it is used
- Uses cache behavior to investigate surprising performance differences in CPU-bound Go code.
- How deep it goes
- Explains cache levels, cache-line transfers, and set-associative placement through an address-layout example.
- Examples
- Compares Go matrices with 512- and 513-element rows while summing only their first eight columns.
- What you can do after
- Diagnose/debug with it when data layout or repeated access produces unexpected benchmark results.
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Latency
A CPU cache is a small, fast memory that stores copies of data likely to be accessed by a CPU.
- How it is used
- Guides low-latency data placement and working-set design on multicore and NUMA systems.
- How deep it goes
- Explains cache levels, approximate capacities and latencies, working-set fit, and interactions with execution stalls.
- Examples
- Uses L1 latency and capacity, LLC size, DRAM slowdown, NUMA locality, and speculative branch execution as concrete cases.
- What you can do after
- Evaluate/understand why fitting frequently accessed data within the LLC can improve latency and reduce memory stalls.
Related concepts
- L1 cacheincludes · An L1 cache is a small, low-latency first-level cache located closest to a processor core or execution unit.
- memory hierarchypart of · A memory hierarchy is an arrangement of storage levels with differing capacities, access speeds, latencies, costs, or persistence.
- cache linehas part · A cache line is a fixed-size block of contiguous memory that a processor cache transfers and manages as a unit.
- memorycontrasts with · Memory is a storage resource or mechanism that retains data or computational state for access during computation or later use.
- data-oriented programmingused by · Data-oriented programming is an approach to structuring software around data representations, access patterns, and operations suited to the data's characteristics and intended use.
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