The NES Picture Processing Unit (PPU) is dedicated hardware that generates the game’s video display. It draws screen contents repeatedly and works with video RAM (VRAM), tile patterns, sprites, and palettes. section 1.2 section 2.4
The PPU has its own 2K of VRAM, while tile and sprite patterns come from an 8K cartridge area that may be fixed, bank-switchable, or writable RAM. Cartridge hardware can add more VRAM. section 1.2
Updating the display requires coordinating the CPU with the PPU:
- The 6502 CPU cannot access VRAM directly; it sends changes through PPU control ports. section 1.5.4
- The PPU draws the screen row by row from left to right, so VRAM changes are safest during vertical blanking (vBlank), after the final row. section 1.5.4
- At vBlank, the PPU raises an interrupt signal that generates a non-maskable interrupt (NMI) for the 6502 CPU; the routine must preserve and restore registers it uses. section 1.5.4
- Initialization waits for video hardware, clears memory, initializes sound and controllers, and transfers pattern data to PPU video memory when necessary. section 1.5.1
PPU graphics use 8 × 8 tiles and 8 × 8 sprites. Games organize these patterns into CHR sets along with palettes and tile layouts; cartridge mappers can provide multiple sets. section 2.4
Figure 1.4 NES architecture
Use the architecture diagram to locate the PPU among the NES CPU, memory, cartridge, and audio components. section 1.2
Figure 1.6 NES PPU chip: What is a vBlank?
Use the raster diagram to visualize row-by-row drawing and the vBlank interval available for VRAM updates. section 1.5.4
